1. Field of the Invention
The present invention generally relates to a multilevel interconnect structure, and more particularly to an I-shaped via plug therein.
2. Description of Related Art
In order to build modern integrated circuits, it is necessary to fabricate millions of active devices such as transistors on a single substrate. These individual devices are interconnected by means of metal wiring to form circuits. Further, via plugs are used to connecting lower and upper metal wirings. Since active devices invariably require more than one level of interconnect, multilevel interconnect structures are key elements for ULSI technology. Moreover, the quality of via plug is relative to the reliability of the integrated circuits.
FIGS. 1-4 are cross-sectional views depicting the procedural steps involved in a conventional method of fabricating a multilevel interconnect structure.
Referring to FIG. 1, semiconductor devices (not shown) such as transistors are formed on a substrate 100 made of silicon. Thereafter, an insulating layer or an inter-layer dielectric (ILD) 120 is deposited over the overall surface of the substrate 100 for isolating each transistor from other conductive layers (to be formed later). A lower metal wiring 140 composed of a single aluminum or aluminum alloy and an inter-metal dielectric (IMD) 160 made of low-permittivity insulating materials are sequentially deposited on the ILD 140. Al wiring and low-permittivity insulating materials provide a large margin for improving RC delay. In addition, a lower dielectric constant also reduces the line capacitance and thus cuts down the cross talk between conductors.
Next, referring to FIG. 2, a via hole 200 is formed in the IMD 160 by means of a photolithography process. Then, referring to FIG. 3, a metal layer 300 made of tungsten material is deposited in the via hole 200 as well as on the IMD 160.
Then, referring to FIG. 4, etching back the metal layer 300 leaves a via plug 350 in the via hole 200. After that, an upper metal wiring 400 composed of a single aluminum or aluminum alloy is formed. Electrical connections are made between the upper metal wiring 400 and the lower metal wiring 140 through the use of via plug 350.
However, with a multilevel interconnect structure, it is necessary to pass current from one level of metal wiring to another through via plugs. When the metal design rules are scaled down, the size of the via hole also shrinks, thus increasing the current density in the via plug. Electromigration can occur as a result of crowding current flow through contact interfaces 440 and 420 between the via plug 200 and metal wirings 140 and 400, causing the formation of voids (not shown) in the metal wirings 140 and 400. Such voids may grow to a size that results in an open-circuit and cause failure of electrical connections. That is to say, the known multilevel interconnect structure shown in FIG. 4 can not be utilized, because the via contact resistance increases and the reliability of the device is reduced because of electromigration.
U.S. Pat. No. 5,619,071 discloses an anchord via connection (plug), which extends into and undercuts an underlying interconnection line (lower metal wiring) to lock the via connection into the interconnection line.
However, as described above, electromigration still occurs as a result of crowding current flow through the upper contact interface between the via plug and the upper metal wiring. In addition, high contact resistance is generated due to the small cross section of the upper contact interface. Furthermore, the upper contact interface and the lower contact interface are not symmetric.